// #target: macos-x64
module test;

fn void main()
{
	int a = 0;
	int b = 0;
	switch (a)
	{
		case 0:
		case 1:
			b += 1;
			nextcase default;
		case 2:
			b *= 2;
		default:
			b *= 3;
	}
	switch FOO: (a)
    {
    	case 0:
    	case 1:
    	    b -= 1;
    		switch (a)
    		{
    		    case 0:
    		        b /= 2;
    		        nextcase FOO: default;
    		    default:
    		        b /= 3;
    		}
    		nextcase;
    	case 2:
    	    b *= 2;
		default:
			b *= 10;
    }
}

/* #expect: test.ll

entry:
  %a = alloca i32, align 4
  %b = alloca i32, align 4
  %switch = alloca i32, align 4
  %switch3 = alloca i32, align 4
  %switch6 = alloca i32, align 4
  store i32 0, ptr %a, align 4
  store i32 0, ptr %b, align 4
  %0 = load i32, ptr %a, align 4
  store i32 %0, ptr %switch, align 4
  br label %switch.entry
switch.entry:                                     ; preds = %entry
  %1 = load i32, ptr %switch, align 4
  switch i32 %1, label %switch.default [
    i32 0, label %switch.case
    i32 1, label %switch.case
    i32 2, label %switch.case1
  ]
switch.case:                                      ; preds = %switch.entry, %switch.entry
  %2 = load i32, ptr %b, align 4
  %add = add i32 %2, 1
  store i32 %add, ptr %b, align 4
  br label %switch.default
switch.case1:                                     ; preds = %switch.entry
  %3 = load i32, ptr %b, align 4
  %mul = mul i32 %3, 2
  store i32 %mul, ptr %b, align 4
  br label %switch.exit
switch.default:                                   ; preds = %switch.case, %switch.entry
  %4 = load i32, ptr %b, align 4
  %mul2 = mul i32 %4, 3
  store i32 %mul2, ptr %b, align 4
  br label %switch.exit
switch.exit:                                      ; preds = %switch.default, %switch.case1
  %5 = load i32, ptr %a, align 4
  store i32 %5, ptr %switch3, align 4
  br label %switch.entry4
switch.entry4:                                    ; preds = %switch.exit
  %6 = load i32, ptr %switch3, align 4
  switch i32 %6, label %switch.default14 [
    i32 0, label %switch.case5
    i32 1, label %switch.case5
    i32 2, label %switch.case12
  ]
switch.case5:                                     ; preds = %switch.entry4, %switch.entry4
  %7 = load i32, ptr %b, align 4
  %sub = sub i32 %7, 1
  store i32 %sub, ptr %b, align 4
  %8 = load i32, ptr %a, align 4
  store i32 %8, ptr %switch6, align 4
  br label %switch.entry7
switch.entry7:                                    ; preds = %switch.case5
  %9 = load i32, ptr %switch6, align 4
  switch i32 %9, label %switch.default9 [
    i32 0, label %switch.case8
  ]
switch.case8:                                     ; preds = %switch.entry7
  %10 = load i32, ptr %b, align 4
  %sdiv = sdiv i32 %10, 2
  store i32 %sdiv, ptr %b, align 4
  br label %switch.default14
switch.default9:                                  ; preds = %switch.entry7
  %11 = load i32, ptr %b, align 4
  %sdiv10 = sdiv i32 %11, 3
  store i32 %sdiv10, ptr %b, align 4
  br label %switch.exit11
switch.exit11:                                    ; preds = %switch.default9
  br label %switch.case12
switch.case12:                                    ; preds = %switch.entry4, %switch.exit11
  %12 = load i32, ptr %b, align 4
  %mul13 = mul i32 %12, 2
  store i32 %mul13, ptr %b, align 4
  br label %switch.exit16
switch.default14:                                 ; preds = %switch.case8, %switch.entry4
  %13 = load i32, ptr %b, align 4
  %mul15 = mul i32 %13, 10
  store i32 %mul15, ptr %b, align 4
  br label %switch.exit16
switch.exit16:                                    ; preds = %switch.default14, %switch.case12
  ret void