Add RISC-V block asm support

This commit is contained in:
Chuck Benedict
2024-08-20 12:43:55 -07:00
committed by Christoffer Lerno
parent d32861193b
commit 05ab0707fc
18 changed files with 749 additions and 11 deletions

View File

@@ -0,0 +1,30 @@
// #target: elf-riscv32
module test;
def Sum = fn int(int a, int b);
fn int sum(int a, int b)
{
return a + b;
}
fn void main(String[] args)
{
int a = 1;
int b = 2;
int result = 0;
Sum sum_ptr = ∑
asm
{
mv $a0, a;
mv $a1, b;
jalr $ra, sum_ptr, 0;
mv result, $a0;
}
}
/* #expect: test.ll
"mv a0, $1\0Amv a1, $2\0Ajalr ra, $3, 0\0Amv $0, a0\0A", "=r,r,r,r,~{x1},~{x10},~{x11}"(i32 %1, i32 %2, ptr %3)