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Add RISC-V block asm support
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committed by
Christoffer Lerno
parent
d32861193b
commit
05ab0707fc
30
test/test_suite/asm/asm_jump_rv.c3t
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30
test/test_suite/asm/asm_jump_rv.c3t
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@@ -0,0 +1,30 @@
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// #target: elf-riscv32
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module test;
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def Sum = fn int(int a, int b);
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fn int sum(int a, int b)
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{
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return a + b;
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}
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fn void main(String[] args)
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{
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int a = 1;
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int b = 2;
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int result = 0;
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Sum sum_ptr = ∑
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asm
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{
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mv $a0, a;
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mv $a1, b;
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jalr $ra, sum_ptr, 0;
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mv result, $a0;
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}
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}
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/* #expect: test.ll
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"mv a0, $1\0Amv a1, $2\0Ajalr ra, $3, 0\0Amv $0, a0\0A", "=r,r,r,r,~{x1},~{x10},~{x11}"(i32 %1, i32 %2, ptr %3)
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