From 0d147a48b2120f0069ec9c5eea15f8037b0a14ee Mon Sep 17 00:00:00 2001
From: Christoffer Lerno <christoffer@aegik.com>
Date: Mon, 23 Jun 2025 00:36:15 +0200
Subject: [PATCH] Another fix to #2226

---
 src/compiler/sema_decls.c                     |  1 +
 .../methods/overload_symmetric_ambiguity.c3t  | 40 +++++++++++++++++++
 2 files changed, 41 insertions(+)
 create mode 100644 test/test_suite/methods/overload_symmetric_ambiguity.c3t

diff --git a/src/compiler/sema_decls.c b/src/compiler/sema_decls.c
index 955cf2002..3c6d536c0 100755
--- a/src/compiler/sema_decls.c
+++ b/src/compiler/sema_decls.c
@@ -1807,6 +1807,7 @@ static OverloadMatch sema_find_typed_operator_in_list(SemaContext *context, Decl
 		if (func->func_decl.operator != operator_overload) continue;
 		if (parent_type && parent_type != typeget(func->func_decl.type_parent)) continue;
 		if ((overload_type & func->func_decl.overload_type) == 0) continue;
+		if (candidate == func) continue;
 		OverloadMatch match = OVERLOAD_MATCH_WILDCARD;
 		if (!func->func_decl.is_wildcard_overload)
 		{
diff --git a/test/test_suite/methods/overload_symmetric_ambiguity.c3t b/test/test_suite/methods/overload_symmetric_ambiguity.c3t
new file mode 100644
index 000000000..fdf229010
--- /dev/null
+++ b/test/test_suite/methods/overload_symmetric_ambiguity.c3t
@@ -0,0 +1,40 @@
+module test;
+typedef Byte = inline ushort;
+
+macro Byte Byte.add(self, int other) @operator_s(+) => (Byte)((ushort)self + (ushort)other);
+
+
+fn int main(String[] args)
+{
+	Byte b = 2;
+	Byte c = 1;
+	Byte d = c + b;
+	return 0;
+}
+
+/* #expect: test.ll
+
+
+define i32 @test.main([2 x i64] %0) #0 {
+entry:
+  %args = alloca %"char[][]", align 8
+  %b = alloca i16, align 2
+  %c = alloca i16, align 2
+  %d = alloca i16, align 2
+  %self = alloca i16, align 2
+  store [2 x i64] %0, ptr %args, align 8
+  store i16 2, ptr %b, align 2
+  store i16 1, ptr %c, align 2
+  %1 = load i16, ptr %c, align 2
+  store i16 %1, ptr %self, align 2
+  %2 = load i16, ptr %b, align 2
+  %zext = zext i16 %2 to i32
+  %3 = load i16, ptr %self, align 2
+  %zext1 = zext i16 %3 to i32
+  %trunc = trunc i32 %zext to i16
+  %zext2 = zext i16 %trunc to i32
+  %add = add i32 %zext1, %zext2
+  %trunc3 = trunc i32 %add to i16
+  store i16 %trunc3, ptr %d, align 2
+  ret i32 0
+}