From 3fe55b5e51e698d0fcf8bad8c23f876f690fe367 Mon Sep 17 00:00:00 2001 From: Christoffer Lerno Date: Tue, 20 Jan 2026 16:46:47 +0100 Subject: [PATCH] - Vectors not converted to arrays when passed as raw vaargs. #2776 --- releasenotes.md | 3 +- src/compiler/sema_casts.c | 6 +++ test/test_suite/abi/sysv_abi_vaarg_vector.c3t | 39 +++++++++++++++++++ 3 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 test/test_suite/abi/sysv_abi_vaarg_vector.c3t diff --git a/releasenotes.md b/releasenotes.md index 6565a8a1f..5c4b880cd 100644 --- a/releasenotes.md +++ b/releasenotes.md @@ -20,7 +20,8 @@ - Module-based generics using {} is deprecated. - Create optional with `~` instead of `?`. `return io::EOF?;` becomes `return io::EOF~`. - Deprecated use of `?` to create optional. - +- Vectors not converted to arrays when passed as raw vaargs. #2776 + ### Fixes - Regression with npot vector in struct triggering an assert #2219. - Casting bitstruct to wider base type should be single step #2616. diff --git a/src/compiler/sema_casts.c b/src/compiler/sema_casts.c index 024148995..99b1488a1 100644 --- a/src/compiler/sema_casts.c +++ b/src/compiler/sema_casts.c @@ -259,6 +259,12 @@ void cast_promote_vararg(Expr *arg) cast_no_check(arg, type_get_ptr(arg_type->array.base), IS_OPTIONAL(arg)); } + // We convert non-simd vectors to arrays + if (arg_type->type_kind == TYPE_VECTOR) + { + cast_no_check(arg, type_array_from_vector(arg_type), IS_OPTIONAL(arg)); + } + } /** diff --git a/test/test_suite/abi/sysv_abi_vaarg_vector.c3t b/test/test_suite/abi/sysv_abi_vaarg_vector.c3t new file mode 100644 index 000000000..46ac2643f --- /dev/null +++ b/test/test_suite/abi/sysv_abi_vaarg_vector.c3t @@ -0,0 +1,39 @@ +// #target: linux-x64 +// #opt: --x86cpu=avx512 +module test; +import libc; +fn void testi() +{ + int[<4>] y = { 1, 2, 3, 4 }; + libc::printf("", y[0], y ); +} +fn void main() +{ + testi(); +} + +/* #expect: test.ll + +define void @test.testi() #0 { +entry: + %y = alloca <4 x i32>, align 16 + %taddr = alloca [4 x i32], align 16 + store <4 x i32> , ptr %y, align 16 + %0 = load <4 x i32>, ptr %y, align 16 + %1 = extractelement <4 x i32> %0, i64 0 + %2 = load <4 x i32>, ptr %y, align 16 + %3 = extractelement <4 x i32> %2, i64 0 + %4 = insertvalue [4 x i32] undef, i32 %3, 0 + %5 = extractelement <4 x i32> %2, i64 1 + %6 = insertvalue [4 x i32] %4, i32 %5, 1 + %7 = extractelement <4 x i32> %2, i64 2 + %8 = insertvalue [4 x i32] %6, i32 %7, 2 + %9 = extractelement <4 x i32> %2, i64 3 + %10 = insertvalue [4 x i32] %8, i32 %9, 3 + store [4 x i32] %10, ptr %taddr, align 16 + %lo = load i64, ptr %taddr, align 16 + %ptradd = getelementptr inbounds i8, ptr %taddr, i64 8 + %hi = load i64, ptr %ptradd, align 8 + %11 = call i32 (ptr, ...) @printf(ptr @.str, i32 %1, i64 %lo, i64 %hi) + ret void +}