Feat/asm x86 (#1046)

* fix(asm): consider asm blocks as volatile
When asm blocks are not marked as volatile, they may be (wrongly)
discarded by LLVM optimization passes.
* fix(asm): mark syscall as clobbering return register
The `syscall` instruction returns the system call result in the `rax`
register.
* feat(asm): add push instructions.
* feat(asm): add pop instructions
This commit is contained in:
pini
2023-10-14 20:50:45 +02:00
committed by GitHub
parent 682dfd0e47
commit 76fa404b89
7 changed files with 40 additions and 7 deletions

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@@ -28,9 +28,17 @@ fn void main(String[] args)
iretl;
iretw;
iretq;
push 1;
pushw 2;
pushw $ax;
pushw [&x];
pushq $rax;
pushq [&x];
popw $ax;
popq $rax;
}
}
/* #expect: test.ll
"in $$3, %eax\0Ain %dx, %ax\0Aincb %al\0Aincw %bx\0Aincl %eax\0Aincq %rax\0Aincl $0\0Ainsb \0Ainsw \0Ainsl \0Aint $$8\0Aint3 \0Ainvd \0Ainvlpg $0\0Ainvpcid $1, %rax\0Ainvlpga %rax, %ecx\0Airet \0Airetl \0Airetw \0Airetq \0A", "=*&m,*m,~{cc},~{rax},~{rbx},~{flags},~{dirflag},~{fspr}"
"in $$3, %eax\0Ain %dx, %ax\0Aincb %al\0Aincw %bx\0Aincl %eax\0Aincq %rax\0Aincl $0\0Ainsb \0Ainsw \0Ainsl \0Aint $$8\0Aint3 \0Ainvd \0Ainvlpg $0\0Ainvpcid $1, %rax\0Ainvlpga %rax, %ecx\0Airet \0Airetl \0Airetw \0Airetq \0Apush $$1\0Apushw $$2\0Apushw %ax\0Apushw $1\0Apushq %rax\0Apushq $1\0Apopw %ax\0Apopq %rax\0A", "=*&m,*m,~{cc},~{rax},~{rbx},~{flags},~{dirflag},~{fspr}"

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@@ -43,8 +43,8 @@ fn void main()
%7 = load i32, ptr %x, align 4
%add3 = add i32 23, %7
%8 = load i32, ptr %aa, align 4
%9 = call { i32, i32 } asm alignstack "movl $$4, $0\0Amovl $0, ($3)\0Amovl $$1, $0\0Amovl $0, 4($4,$5,4)\0Amovl $6, %eax\0Amovl %eax, $0\0Amovq $$33, $1\0Aaddl $$22, $2\0A", "=&r,=*&m,=r,r,r,r,r,2,~{cc},~{rax},~{flags},~{dirflag},~{fspr}"(ptr elementtype(i64) %z, ptr %4, ptr %5, i64 %6, i32 %add3, i32 %8)
%9 = call { i32, i32 } asm sideeffect alignstack "movl $$4, $0\0Amovl $0, ($3)\0Amovl $$1, $0\0Amovl $0, 4($4,$5,4)\0Amovl $6, %eax\0Amovl %eax, $0\0Amovq $$33, $1\0Aaddl $$22, $2\0A", "=&r,=*&m,=r,r,r,r,r,2,~{cc},~{rax},~{flags},~{dirflag},~{fspr}"(ptr elementtype(i64) %z, ptr %4, ptr %5, i64 %6, i32 %add3, i32 %8)
%10 = extractvalue { i32, i32 } %9, 0
store i32 %10, ptr %x, align 4
%11 = extractvalue { i32, i32 } %9, 1
store i32 %11, ptr %aa, align 4
store i32 %11, ptr %aa, align 4

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@@ -13,7 +13,7 @@ fn void start() @export("_start") @naked @nostrip {
define void @_start() #0 {
entry:
call void asm alignstack "movq $$60, %rax\0Amovq $$42, %rdi\0Asyscall \0A", "~{cc},~{rax},~{rcx},~{r8},~{r11},~{flags},~{dirflag},~{fspr}"()
call void asm sideeffect alignstack "movq $$60, %rax\0Amovq $$42, %rdi\0Asyscall \0A", "~{cc},~{rax},~{rcx},~{r8},~{r11},~{flags},~{dirflag},~{fspr}"()
ret void
}

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@@ -0,0 +1,17 @@
// #target: macos-x64
module testing;
fn void start() @export("_start") @naked @nostrip {
asm {
syscall;
}
}
/* #expect: testing.ll
define void @_start() #0 {
entry:
call void asm sideeffect alignstack "syscall \0A", "~{cc},~{rax},~{rcx},~{r11},~{flags},~{dirflag},~{fspr}"()
ret void
}