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RISCV: Correct auipc imm; claify signed imm error; add imm negative tests. Allow fitted int asm imm const in uints; add rv regs
59 lines
792 B
Plaintext
59 lines
792 B
Plaintext
// #target: elf-riscv32
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module test;
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fn void test1()
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{
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asm
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{
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andi $s1, $s2, -2049; // #error: 'andi' expected 'short' limited to 12 bits.
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}
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}
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fn void test2()
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{
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asm
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{
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ori $t0, $t1, 2048; // #error: 'ori' expected 'short' limited to 12 bits.
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}
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}
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fn void test3()
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{
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asm
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{
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slli $a0, $a1, 32u; // #error: 'slli' expected 'char' limited to 5 bits.
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}
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}
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fn void test4()
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{
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asm
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{
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lui $a0, 0xFFFFFF; // #error: 'lui' expected 'uint' limited to 20 bits.
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}
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}
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fn void test5()
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{
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asm
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{
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lui $a0, -1; // #error: 'lui' expected 'uint' limited to 20 bits.
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}
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}
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fn void test6()
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{
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asm
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{
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auipc $a0, -1; // #error: 'auipc' expected 'uint' limited to 20 bits.
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}
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}
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fn void test7()
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{
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asm
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{
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slli $a0, 1, 31u; // #error: 'slli' does not support a direct integer constant here.
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}
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}
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