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4b13ad692a
* fixes for RISC-V ABI Implementation #1567 Fixed RISC-V floating-point ABI by correcting the target triple to `riscv64-unknown-linux-gnu`, adding the `target-abi` module flag, and ensuring ABI-required CPU features are enabled. I tested this with: ```bash build/c3c compile-only --target linux-riscv64 rv_hello.c3 readelf -h obj/linux-riscv64/rv_hello.o | grep Flags # Output: Flags: 0x5, RVC, double-float ABI ``` ```bash # and qemu because I don't have a riscv machine :/ qemu-riscv64-static -L /usr/riscv64-linux-gnu ./rv_hello ``` --- @lerno I purposedly left these two failing tests to clearly see the difference. `test/test_suite/abi/riscv64-lp64-lp64f-abi-1.c3t` `test/test_suite/abi/riscv64-lp64-abi.c3t` * improve Linux cross-compilation, specifically for RISC-V - Implement automatic sysroot and CRT object discovery for RISC-V. - Fix dynamic linker paths and emulation flags for LLD. - Link against libgcc to resolve required arithmetic symbols. * Update tests. * fix linker CRT detection by centralizing host arch check use target_host_arch() in linker.c move target_host_arch() from hostinfo.c to target.c * missing debug info --------- Co-authored-by: Christoffer Lerno <christoffer@aegik.com>
47 lines
1.4 KiB
Plaintext
47 lines
1.4 KiB
Plaintext
// #target: linux-riscv64
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module test;
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struct Large
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{
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long a, b, c, d;
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}
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typedef V32i8 = char[<32>] @simd;
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fn int f_scalar_stack_1(int a, int128 b, float c, float128 d, V32i8 e, char f, ichar g, char h)
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{
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return g + h;
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}
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fn Large f_scalar_stack_2(double a, int128 b, float128 c, V32i8 d, char e, ichar f, char g)
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{
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return {(long)(a), e, f, g};
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}
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/* #expect: test.ll
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define signext i32 @test.f_scalar_stack_1(i32 signext %0, i128 %1, float %2, fp128 %3, ptr align 32 %4, i8 zeroext %5, i8 signext %6, i8 %7) #0 {
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entry:
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%sext = sext i8 %6 to i32
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%zext = zext i8 %7 to i32
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%add = add i32 %sext, %zext
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ret i32 %add
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}
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define void @test.f_scalar_stack_2(ptr noalias sret(%Large) align 8 %0, double %1, i128 %2, fp128 %3, ptr align 32 %4, i8 zeroext %5, i8 signext %6, i8 %7) #0 {
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entry:
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%literal = alloca %Large, align 8
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%fpsi = fptosi double %1 to i64
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store i64 %fpsi, ptr %literal, align 8
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%ptradd = getelementptr inbounds i8, ptr %literal, i64 8
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%zext = zext i8 %5 to i64
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store i64 %zext, ptr %ptradd, align 8
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%ptradd1 = getelementptr inbounds i8, ptr %literal, i64 16
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%sext = sext i8 %6 to i64
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store i64 %sext, ptr %ptradd1, align 8
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%ptradd2 = getelementptr inbounds i8, ptr %literal, i64 24
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%zext3 = zext i8 %7 to i64
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store i64 %zext3, ptr %ptradd2, align 8
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call void @llvm.memcpy.p0.p0.i32(ptr align 8 %0, ptr align 8 %literal, i32 32, i1 false)
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ret void
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