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714 lines
25 KiB
Plaintext
714 lines
25 KiB
Plaintext
// #target: macos-x64
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module examples;
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import libc;
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import std::io;
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fn void example_for()
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{
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// the for-loop is the same as C99.
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for (int i = 0; i < 10; i++)
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{
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libc::printf("%d\n", i);
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}
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// also equal
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for (;;)
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{
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// ..
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}
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}
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enum Height : uint
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{
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LOW,
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MEDIUM,
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HIGH,
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}
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fn void demo_enum(Height h)
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{
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switch (h)
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{
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case LOW:
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case MEDIUM:
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io::printn("Not high");
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// Implicit break.
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case HIGH:
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io::printn("High");
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}
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// This also works
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switch (h)
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{
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case LOW:
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case MEDIUM:
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io::printn("Not high");
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// Implicit break.
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case Height.HIGH:
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io::printn("High");
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}
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// Completely empty cases are not allowed.
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switch (h)
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{
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case LOW:
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break; // Explicit break required, since switches can't be empty.
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case MEDIUM:
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io::printn("Medium");
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case HIGH:
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break;
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}
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// special checking of switching on enum types
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switch (h)
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{
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case LOW:
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case MEDIUM:
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case HIGH:
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break;
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default: // warning: default label in switch which covers all enumeration value
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break;
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}
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// Using "nextcase" will fallthrough to the next case statement,
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// and each case statement starts its own scope.
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switch (h)
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{
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case LOW:
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int a = 1;
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io::printn("A");
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nextcase;
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case MEDIUM:
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int a = 2;
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io::printn("B");
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nextcase;
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case HIGH:
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// a is not defined here
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io::printn("C");
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}
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}
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/* #expect: examples.ll
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define void @examples.example_for() #0 {
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entry:
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%i = alloca i32, align 4
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store i32 0, ptr %i, align 4
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br label %loop.cond
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loop.cond: ; preds = %loop.body, %entry
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%0 = load i32, ptr %i, align 4
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%lt = icmp slt i32 %0, 10
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br i1 %lt, label %loop.body, label %loop.exit
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loop.body: ; preds = %loop.cond
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%1 = load i32, ptr %i, align 4
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%2 = call i32 (ptr, ...) @printf(ptr @.str, i32 %1)
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%3 = load i32, ptr %i, align 4
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%add = add i32 %3, 1
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store i32 %add, ptr %i, align 4
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br label %loop.cond
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loop.exit: ; preds = %loop.cond
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%4 = load ptr, ptr @std.core.builtin.panic, align 8
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call void %4(ptr @.panic_msg, i64 19, ptr @.file, i64 21, ptr @.func, i64 11, i32 14)
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unreachable
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}
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define void @examples.demo_enum(i32 %0) #0 {
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entry:
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%switch = alloca i32, align 4
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%len = alloca i64, align 8
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%error_var = alloca i64, align 8
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%retparam = alloca i64, align 8
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%error_var2 = alloca i64, align 8
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%error_var8 = alloca i64, align 8
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%len15 = alloca i64, align 8
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%error_var16 = alloca i64, align 8
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%retparam18 = alloca i64, align 8
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%error_var24 = alloca i64, align 8
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%error_var30 = alloca i64, align 8
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%switch38 = alloca i32, align 4
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%len41 = alloca i64, align 8
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%error_var42 = alloca i64, align 8
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%retparam44 = alloca i64, align 8
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%error_var50 = alloca i64, align 8
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%error_var56 = alloca i64, align 8
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%len65 = alloca i64, align 8
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%error_var66 = alloca i64, align 8
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%retparam68 = alloca i64, align 8
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%error_var74 = alloca i64, align 8
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%error_var80 = alloca i64, align 8
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%switch89 = alloca i32, align 4
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%len93 = alloca i64, align 8
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%error_var94 = alloca i64, align 8
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%retparam96 = alloca i64, align 8
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%error_var102 = alloca i64, align 8
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%error_var108 = alloca i64, align 8
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%switch118 = alloca i32, align 4
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%switch122 = alloca i32, align 4
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%a = alloca i32, align 4
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%len125 = alloca i64, align 8
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%error_var126 = alloca i64, align 8
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%retparam128 = alloca i64, align 8
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%error_var134 = alloca i64, align 8
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%error_var140 = alloca i64, align 8
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%a149 = alloca i32, align 4
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%len150 = alloca i64, align 8
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%error_var151 = alloca i64, align 8
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%retparam153 = alloca i64, align 8
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%error_var159 = alloca i64, align 8
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%error_var165 = alloca i64, align 8
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%len174 = alloca i64, align 8
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%error_var175 = alloca i64, align 8
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%retparam177 = alloca i64, align 8
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%error_var183 = alloca i64, align 8
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%error_var189 = alloca i64, align 8
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store i32 %0, ptr %switch, align 4
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br label %switch.entry
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switch.entry: ; preds = %entry
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%1 = load i32, ptr %switch, align 4
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switch i32 %1, label %switch.exit [
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i32 0, label %switch.case
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i32 1, label %switch.case
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i32 2, label %switch.case14
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]
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switch.case: ; preds = %switch.entry, %switch.entry
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%2 = call ptr @std.io.stdout()
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%3 = call i64 @std.io.File.write(ptr %retparam, ptr %2, ptr @.str.1, i64 8)
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%not_err = icmp eq i64 %3, 0
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%4 = call i1 @llvm.expect.i1(i1 %not_err, i1 true)
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br i1 %4, label %after_check, label %assign_optional
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assign_optional: ; preds = %switch.case
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store i64 %3, ptr %error_var, align 8
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br label %guard_block
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after_check: ; preds = %switch.case
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br label %noerr_block
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guard_block: ; preds = %assign_optional
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br label %voiderr
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noerr_block: ; preds = %after_check
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%5 = load i64, ptr %retparam, align 8
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store i64 %5, ptr %len, align 8
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%6 = call i64 @std.io.File.write_byte(ptr %2, i8 zeroext 10)
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%not_err3 = icmp eq i64 %6, 0
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%7 = call i1 @llvm.expect.i1(i1 %not_err3, i1 true)
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br i1 %7, label %after_check5, label %assign_optional4
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assign_optional4: ; preds = %noerr_block
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store i64 %6, ptr %error_var2, align 8
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br label %guard_block6
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after_check5: ; preds = %noerr_block
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br label %noerr_block7
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guard_block6: ; preds = %assign_optional4
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br label %voiderr
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noerr_block7: ; preds = %after_check5
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%8 = call i64 @std.io.File.flush(ptr %2)
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%not_err9 = icmp eq i64 %8, 0
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%9 = call i1 @llvm.expect.i1(i1 %not_err9, i1 true)
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br i1 %9, label %after_check11, label %assign_optional10
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assign_optional10: ; preds = %noerr_block7
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store i64 %8, ptr %error_var8, align 8
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br label %guard_block12
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after_check11: ; preds = %noerr_block7
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br label %noerr_block13
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guard_block12: ; preds = %assign_optional10
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br label %voiderr
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noerr_block13: ; preds = %after_check11
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%10 = load i64, ptr %len, align 8
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%add = add i64 %10, 1
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br label %voiderr
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voiderr: ; preds = %noerr_block13, %guard_block12, %guard_block6, %guard_block
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br label %switch.exit
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switch.case14: ; preds = %switch.entry
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%11 = call ptr @std.io.stdout()
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%12 = call i64 @std.io.File.write(ptr %retparam18, ptr %11, ptr @.str.2, i64 4)
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%not_err19 = icmp eq i64 %12, 0
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%13 = call i1 @llvm.expect.i1(i1 %not_err19, i1 true)
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br i1 %13, label %after_check21, label %assign_optional20
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assign_optional20: ; preds = %switch.case14
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store i64 %12, ptr %error_var16, align 8
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br label %guard_block22
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after_check21: ; preds = %switch.case14
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br label %noerr_block23
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guard_block22: ; preds = %assign_optional20
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br label %voiderr37
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noerr_block23: ; preds = %after_check21
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%14 = load i64, ptr %retparam18, align 8
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store i64 %14, ptr %len15, align 8
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%15 = call i64 @std.io.File.write_byte(ptr %11, i8 zeroext 10)
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%not_err25 = icmp eq i64 %15, 0
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%16 = call i1 @llvm.expect.i1(i1 %not_err25, i1 true)
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br i1 %16, label %after_check27, label %assign_optional26
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assign_optional26: ; preds = %noerr_block23
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store i64 %15, ptr %error_var24, align 8
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br label %guard_block28
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after_check27: ; preds = %noerr_block23
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br label %noerr_block29
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guard_block28: ; preds = %assign_optional26
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br label %voiderr37
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noerr_block29: ; preds = %after_check27
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%17 = call i64 @std.io.File.flush(ptr %11)
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%not_err31 = icmp eq i64 %17, 0
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%18 = call i1 @llvm.expect.i1(i1 %not_err31, i1 true)
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br i1 %18, label %after_check33, label %assign_optional32
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assign_optional32: ; preds = %noerr_block29
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store i64 %17, ptr %error_var30, align 8
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br label %guard_block34
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after_check33: ; preds = %noerr_block29
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br label %noerr_block35
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guard_block34: ; preds = %assign_optional32
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br label %voiderr37
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noerr_block35: ; preds = %after_check33
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%19 = load i64, ptr %len15, align 8
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%add36 = add i64 %19, 1
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br label %voiderr37
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voiderr37: ; preds = %noerr_block35, %guard_block34, %guard_block28, %guard_block22
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br label %switch.exit
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switch.exit: ; preds = %voiderr37, %voiderr, %switch.entry
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store i32 %0, ptr %switch38, align 4
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br label %switch.entry39
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switch.entry39: ; preds = %switch.exit
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%20 = load i32, ptr %switch38, align 4
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switch i32 %20, label %switch.exit88 [
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i32 0, label %switch.case40
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i32 1, label %switch.case40
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i32 2, label %switch.case64
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]
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switch.case40: ; preds = %switch.entry39, %switch.entry39
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%21 = call ptr @std.io.stdout()
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%22 = call i64 @std.io.File.write(ptr %retparam44, ptr %21, ptr @.str.3, i64 8)
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%not_err45 = icmp eq i64 %22, 0
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%23 = call i1 @llvm.expect.i1(i1 %not_err45, i1 true)
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br i1 %23, label %after_check47, label %assign_optional46
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assign_optional46: ; preds = %switch.case40
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store i64 %22, ptr %error_var42, align 8
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br label %guard_block48
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after_check47: ; preds = %switch.case40
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br label %noerr_block49
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guard_block48: ; preds = %assign_optional46
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br label %voiderr63
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noerr_block49: ; preds = %after_check47
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%24 = load i64, ptr %retparam44, align 8
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store i64 %24, ptr %len41, align 8
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%25 = call i64 @std.io.File.write_byte(ptr %21, i8 zeroext 10)
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%not_err51 = icmp eq i64 %25, 0
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%26 = call i1 @llvm.expect.i1(i1 %not_err51, i1 true)
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br i1 %26, label %after_check53, label %assign_optional52
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assign_optional52: ; preds = %noerr_block49
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store i64 %25, ptr %error_var50, align 8
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br label %guard_block54
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after_check53: ; preds = %noerr_block49
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br label %noerr_block55
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guard_block54: ; preds = %assign_optional52
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br label %voiderr63
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noerr_block55: ; preds = %after_check53
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%27 = call i64 @std.io.File.flush(ptr %21)
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%not_err57 = icmp eq i64 %27, 0
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%28 = call i1 @llvm.expect.i1(i1 %not_err57, i1 true)
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br i1 %28, label %after_check59, label %assign_optional58
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assign_optional58: ; preds = %noerr_block55
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store i64 %27, ptr %error_var56, align 8
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br label %guard_block60
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after_check59: ; preds = %noerr_block55
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br label %noerr_block61
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guard_block60: ; preds = %assign_optional58
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br label %voiderr63
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noerr_block61: ; preds = %after_check59
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%29 = load i64, ptr %len41, align 8
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%add62 = add i64 %29, 1
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br label %voiderr63
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voiderr63: ; preds = %noerr_block61, %guard_block60, %guard_block54, %guard_block48
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br label %switch.exit88
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switch.case64: ; preds = %switch.entry39
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%30 = call ptr @std.io.stdout()
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%31 = call i64 @std.io.File.write(ptr %retparam68, ptr %30, ptr @.str.4, i64 4)
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%not_err69 = icmp eq i64 %31, 0
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%32 = call i1 @llvm.expect.i1(i1 %not_err69, i1 true)
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br i1 %32, label %after_check71, label %assign_optional70
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assign_optional70: ; preds = %switch.case64
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store i64 %31, ptr %error_var66, align 8
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br label %guard_block72
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after_check71: ; preds = %switch.case64
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br label %noerr_block73
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guard_block72: ; preds = %assign_optional70
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br label %voiderr87
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noerr_block73: ; preds = %after_check71
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%33 = load i64, ptr %retparam68, align 8
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store i64 %33, ptr %len65, align 8
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%34 = call i64 @std.io.File.write_byte(ptr %30, i8 zeroext 10)
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%not_err75 = icmp eq i64 %34, 0
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%35 = call i1 @llvm.expect.i1(i1 %not_err75, i1 true)
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br i1 %35, label %after_check77, label %assign_optional76
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assign_optional76: ; preds = %noerr_block73
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store i64 %34, ptr %error_var74, align 8
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br label %guard_block78
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after_check77: ; preds = %noerr_block73
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br label %noerr_block79
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guard_block78: ; preds = %assign_optional76
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br label %voiderr87
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noerr_block79: ; preds = %after_check77
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%36 = call i64 @std.io.File.flush(ptr %30)
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%not_err81 = icmp eq i64 %36, 0
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%37 = call i1 @llvm.expect.i1(i1 %not_err81, i1 true)
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br i1 %37, label %after_check83, label %assign_optional82
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assign_optional82: ; preds = %noerr_block79
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store i64 %36, ptr %error_var80, align 8
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br label %guard_block84
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after_check83: ; preds = %noerr_block79
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br label %noerr_block85
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guard_block84: ; preds = %assign_optional82
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br label %voiderr87
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noerr_block85: ; preds = %after_check83
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%38 = load i64, ptr %len65, align 8
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%add86 = add i64 %38, 1
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br label %voiderr87
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voiderr87: ; preds = %noerr_block85, %guard_block84, %guard_block78, %guard_block72
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br label %switch.exit88
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switch.exit88: ; preds = %voiderr87, %voiderr63, %switch.entry39
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store i32 %0, ptr %switch89, align 4
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br label %switch.entry90
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switch.entry90: ; preds = %switch.exit88
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%39 = load i32, ptr %switch89, align 4
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switch i32 %39, label %switch.exit117 [
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i32 0, label %switch.case91
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i32 1, label %switch.case92
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i32 2, label %switch.case116
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]
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switch.case91: ; preds = %switch.entry90
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br label %switch.exit117
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switch.case92: ; preds = %switch.entry90
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%40 = call ptr @std.io.stdout()
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%41 = call i64 @std.io.File.write(ptr %retparam96, ptr %40, ptr @.str.5, i64 6)
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%not_err97 = icmp eq i64 %41, 0
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%42 = call i1 @llvm.expect.i1(i1 %not_err97, i1 true)
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br i1 %42, label %after_check99, label %assign_optional98
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assign_optional98: ; preds = %switch.case92
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store i64 %41, ptr %error_var94, align 8
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br label %guard_block100
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after_check99: ; preds = %switch.case92
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br label %noerr_block101
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guard_block100: ; preds = %assign_optional98
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br label %voiderr115
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noerr_block101: ; preds = %after_check99
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%43 = load i64, ptr %retparam96, align 8
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store i64 %43, ptr %len93, align 8
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%44 = call i64 @std.io.File.write_byte(ptr %40, i8 zeroext 10)
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%not_err103 = icmp eq i64 %44, 0
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%45 = call i1 @llvm.expect.i1(i1 %not_err103, i1 true)
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br i1 %45, label %after_check105, label %assign_optional104
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assign_optional104: ; preds = %noerr_block101
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store i64 %44, ptr %error_var102, align 8
|
|
br label %guard_block106
|
|
|
|
after_check105: ; preds = %noerr_block101
|
|
br label %noerr_block107
|
|
|
|
guard_block106: ; preds = %assign_optional104
|
|
br label %voiderr115
|
|
|
|
noerr_block107: ; preds = %after_check105
|
|
%46 = call i64 @std.io.File.flush(ptr %40)
|
|
%not_err109 = icmp eq i64 %46, 0
|
|
%47 = call i1 @llvm.expect.i1(i1 %not_err109, i1 true)
|
|
br i1 %47, label %after_check111, label %assign_optional110
|
|
|
|
assign_optional110: ; preds = %noerr_block107
|
|
store i64 %46, ptr %error_var108, align 8
|
|
br label %guard_block112
|
|
|
|
after_check111: ; preds = %noerr_block107
|
|
br label %noerr_block113
|
|
|
|
guard_block112: ; preds = %assign_optional110
|
|
br label %voiderr115
|
|
|
|
noerr_block113: ; preds = %after_check111
|
|
%48 = load i64, ptr %len93, align 8
|
|
%add114 = add i64 %48, 1
|
|
br label %voiderr115
|
|
|
|
voiderr115: ; preds = %noerr_block113, %guard_block112, %guard_block106, %guard_block100
|
|
br label %switch.exit117
|
|
|
|
switch.case116: ; preds = %switch.entry90
|
|
br label %switch.exit117
|
|
|
|
switch.exit117: ; preds = %switch.case116, %voiderr115, %switch.case91, %switch.entry90
|
|
store i32 %0, ptr %switch118, align 4
|
|
br label %switch.entry119
|
|
|
|
switch.entry119: ; preds = %switch.exit117
|
|
%49 = load i32, ptr %switch118, align 4
|
|
switch i32 %49, label %switch.default [
|
|
i32 0, label %switch.case120
|
|
i32 1, label %switch.case120
|
|
i32 2, label %switch.case120
|
|
]
|
|
|
|
switch.case120: ; preds = %switch.entry119, %switch.entry119, %switch.entry119
|
|
br label %switch.exit121
|
|
|
|
switch.default: ; preds = %switch.entry119
|
|
br label %switch.exit121
|
|
|
|
switch.exit121: ; preds = %switch.default, %switch.case120
|
|
store i32 %0, ptr %switch122, align 4
|
|
br label %switch.entry123
|
|
|
|
switch.entry123: ; preds = %switch.exit121
|
|
%50 = load i32, ptr %switch122, align 4
|
|
switch i32 %50, label %switch.exit197 [
|
|
i32 0, label %switch.case124
|
|
i32 1, label %switch.case148
|
|
i32 2, label %switch.case173
|
|
]
|
|
|
|
switch.case124: ; preds = %switch.entry123
|
|
store i32 1, ptr %a, align 4
|
|
%51 = call ptr @std.io.stdout()
|
|
%52 = call i64 @std.io.File.write(ptr %retparam128, ptr %51, ptr @.str.6, i64 1)
|
|
%not_err129 = icmp eq i64 %52, 0
|
|
%53 = call i1 @llvm.expect.i1(i1 %not_err129, i1 true)
|
|
br i1 %53, label %after_check131, label %assign_optional130
|
|
|
|
assign_optional130: ; preds = %switch.case124
|
|
store i64 %52, ptr %error_var126, align 8
|
|
br label %guard_block132
|
|
|
|
after_check131: ; preds = %switch.case124
|
|
br label %noerr_block133
|
|
|
|
guard_block132: ; preds = %assign_optional130
|
|
br label %voiderr147
|
|
|
|
noerr_block133: ; preds = %after_check131
|
|
%54 = load i64, ptr %retparam128, align 8
|
|
store i64 %54, ptr %len125, align 8
|
|
%55 = call i64 @std.io.File.write_byte(ptr %51, i8 zeroext 10)
|
|
%not_err135 = icmp eq i64 %55, 0
|
|
%56 = call i1 @llvm.expect.i1(i1 %not_err135, i1 true)
|
|
br i1 %56, label %after_check137, label %assign_optional136
|
|
|
|
assign_optional136: ; preds = %noerr_block133
|
|
store i64 %55, ptr %error_var134, align 8
|
|
br label %guard_block138
|
|
|
|
after_check137: ; preds = %noerr_block133
|
|
br label %noerr_block139
|
|
|
|
guard_block138: ; preds = %assign_optional136
|
|
br label %voiderr147
|
|
|
|
noerr_block139: ; preds = %after_check137
|
|
%57 = call i64 @std.io.File.flush(ptr %51)
|
|
%not_err141 = icmp eq i64 %57, 0
|
|
%58 = call i1 @llvm.expect.i1(i1 %not_err141, i1 true)
|
|
br i1 %58, label %after_check143, label %assign_optional142
|
|
|
|
assign_optional142: ; preds = %noerr_block139
|
|
store i64 %57, ptr %error_var140, align 8
|
|
br label %guard_block144
|
|
|
|
after_check143: ; preds = %noerr_block139
|
|
br label %noerr_block145
|
|
|
|
guard_block144: ; preds = %assign_optional142
|
|
br label %voiderr147
|
|
|
|
noerr_block145: ; preds = %after_check143
|
|
%59 = load i64, ptr %len125, align 8
|
|
%add146 = add i64 %59, 1
|
|
br label %voiderr147
|
|
|
|
voiderr147: ; preds = %noerr_block145, %guard_block144, %guard_block138, %guard_block132
|
|
br label %switch.case148
|
|
|
|
switch.case148: ; preds = %switch.entry123, %voiderr147
|
|
store i32 2, ptr %a149, align 4
|
|
%60 = call ptr @std.io.stdout()
|
|
%61 = call i64 @std.io.File.write(ptr %retparam153, ptr %60, ptr @.str.7, i64 1)
|
|
%not_err154 = icmp eq i64 %61, 0
|
|
%62 = call i1 @llvm.expect.i1(i1 %not_err154, i1 true)
|
|
br i1 %62, label %after_check156, label %assign_optional155
|
|
|
|
assign_optional155: ; preds = %switch.case148
|
|
store i64 %61, ptr %error_var151, align 8
|
|
br label %guard_block157
|
|
|
|
after_check156: ; preds = %switch.case148
|
|
br label %noerr_block158
|
|
|
|
guard_block157: ; preds = %assign_optional155
|
|
br label %voiderr172
|
|
|
|
noerr_block158: ; preds = %after_check156
|
|
%63 = load i64, ptr %retparam153, align 8
|
|
store i64 %63, ptr %len150, align 8
|
|
%64 = call i64 @std.io.File.write_byte(ptr %60, i8 zeroext 10)
|
|
%not_err160 = icmp eq i64 %64, 0
|
|
%65 = call i1 @llvm.expect.i1(i1 %not_err160, i1 true)
|
|
br i1 %65, label %after_check162, label %assign_optional161
|
|
|
|
assign_optional161: ; preds = %noerr_block158
|
|
store i64 %64, ptr %error_var159, align 8
|
|
br label %guard_block163
|
|
|
|
after_check162: ; preds = %noerr_block158
|
|
br label %noerr_block164
|
|
|
|
guard_block163: ; preds = %assign_optional161
|
|
br label %voiderr172
|
|
|
|
noerr_block164: ; preds = %after_check162
|
|
%66 = call i64 @std.io.File.flush(ptr %60)
|
|
%not_err166 = icmp eq i64 %66, 0
|
|
%67 = call i1 @llvm.expect.i1(i1 %not_err166, i1 true)
|
|
br i1 %67, label %after_check168, label %assign_optional167
|
|
|
|
assign_optional167: ; preds = %noerr_block164
|
|
store i64 %66, ptr %error_var165, align 8
|
|
br label %guard_block169
|
|
|
|
after_check168: ; preds = %noerr_block164
|
|
br label %noerr_block170
|
|
|
|
guard_block169: ; preds = %assign_optional167
|
|
br label %voiderr172
|
|
|
|
noerr_block170: ; preds = %after_check168
|
|
%68 = load i64, ptr %len150, align 8
|
|
%add171 = add i64 %68, 1
|
|
br label %voiderr172
|
|
|
|
voiderr172: ; preds = %noerr_block170, %guard_block169, %guard_block163, %guard_block157
|
|
br label %switch.case173
|
|
|
|
switch.case173: ; preds = %switch.entry123, %voiderr172
|
|
%69 = call ptr @std.io.stdout()
|
|
%70 = call i64 @std.io.File.write(ptr %retparam177, ptr %69, ptr @.str.8, i64 1)
|
|
%not_err178 = icmp eq i64 %70, 0
|
|
%71 = call i1 @llvm.expect.i1(i1 %not_err178, i1 true)
|
|
br i1 %71, label %after_check180, label %assign_optional179
|
|
|
|
assign_optional179: ; preds = %switch.case173
|
|
store i64 %70, ptr %error_var175, align 8
|
|
br label %guard_block181
|
|
|
|
after_check180: ; preds = %switch.case173
|
|
br label %noerr_block182
|
|
|
|
guard_block181: ; preds = %assign_optional179
|
|
br label %voiderr196
|
|
|
|
noerr_block182: ; preds = %after_check180
|
|
%72 = load i64, ptr %retparam177, align 8
|
|
store i64 %72, ptr %len174, align 8
|
|
%73 = call i64 @std.io.File.write_byte(ptr %69, i8 zeroext 10)
|
|
%not_err184 = icmp eq i64 %73, 0
|
|
%74 = call i1 @llvm.expect.i1(i1 %not_err184, i1 true)
|
|
br i1 %74, label %after_check186, label %assign_optional185
|
|
|
|
assign_optional185: ; preds = %noerr_block182
|
|
store i64 %73, ptr %error_var183, align 8
|
|
br label %guard_block187
|
|
|
|
after_check186: ; preds = %noerr_block182
|
|
br label %noerr_block188
|
|
|
|
guard_block187: ; preds = %assign_optional185
|
|
br label %voiderr196
|
|
|
|
noerr_block188: ; preds = %after_check186
|
|
%75 = call i64 @std.io.File.flush(ptr %69)
|
|
%not_err190 = icmp eq i64 %75, 0
|
|
%76 = call i1 @llvm.expect.i1(i1 %not_err190, i1 true)
|
|
br i1 %76, label %after_check192, label %assign_optional191
|
|
|
|
assign_optional191: ; preds = %noerr_block188
|
|
store i64 %75, ptr %error_var189, align 8
|
|
br label %guard_block193
|
|
|
|
after_check192: ; preds = %noerr_block188
|
|
br label %noerr_block194
|
|
|
|
guard_block193: ; preds = %assign_optional191
|
|
br label %voiderr196
|
|
|
|
noerr_block194: ; preds = %after_check192
|
|
%77 = load i64, ptr %len174, align 8
|
|
%add195 = add i64 %77, 1
|
|
br label %voiderr196
|
|
|
|
voiderr196: ; preds = %noerr_block194, %guard_block193, %guard_block187, %guard_block181
|
|
br label %switch.exit197
|
|
|
|
switch.exit197: ; preds = %voiderr196, %switch.entry123
|
|
ret void
|
|
} |