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76fa404b89
* fix(asm): consider asm blocks as volatile When asm blocks are not marked as volatile, they may be (wrongly) discarded by LLVM optimization passes. * fix(asm): mark syscall as clobbering return register The `syscall` instruction returns the system call result in the `rax` register. * feat(asm): add push instructions. * feat(asm): add pop instructions
51 lines
1.2 KiB
Plaintext
51 lines
1.2 KiB
Plaintext
// #target: macos-x64
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module test;
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import std::io;
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fn void main()
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{
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int x = 222;
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int y = 223;
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long z = 0;
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z = (long)x + y;
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z *= x;
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int g = 0;
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int* gp = &g;
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int[4] a = { 3, 4, 5, 6 };
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int* xa = &a;
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usz asf = 1;
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int aa = 3;
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asm
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{
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movl x, 4;
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movl [gp], x;
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movl x, 1;
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movl [xa + asf * 4 + 4], x;
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movl $eax, (23 + x);
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movl x, $eax;
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movq [&z], 33;
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addl aa, 22;
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}
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io::printfn("aa: %d", aa);
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io::printfn("Z: %d", z);
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io::printfn("x: %d", x);
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io::printfn("G was: %d", g);
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foreach(int abc : a) io::printfn("%d", abc);
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}
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/* #expect: test.ll
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%4 = load ptr, ptr %gp, align 8
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%5 = load ptr, ptr %xa, align 8
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%6 = load i64, ptr %asf, align 8
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%7 = load i32, ptr %x, align 4
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%add3 = add i32 23, %7
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%8 = load i32, ptr %aa, align 4
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%9 = call { i32, i32 } asm sideeffect alignstack "movl $$4, $0\0Amovl $0, ($3)\0Amovl $$1, $0\0Amovl $0, 4($4,$5,4)\0Amovl $6, %eax\0Amovl %eax, $0\0Amovq $$33, $1\0Aaddl $$22, $2\0A", "=&r,=*&m,=r,r,r,r,r,2,~{cc},~{rax},~{flags},~{dirflag},~{fspr}"(ptr elementtype(i64) %z, ptr %4, ptr %5, i64 %6, i32 %add3, i32 %8)
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%10 = extractvalue { i32, i32 } %9, 0
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store i32 %10, ptr %x, align 4
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%11 = extractvalue { i32, i32 } %9, 1
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store i32 %11, ptr %aa, align 4
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