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Fix of miscompilation
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@@ -1753,7 +1753,7 @@ static void gencontext_emit_logical_and_or(GenContext *c, BEValue *be_value, Exp
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// For vector implementation.
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// Set up basic blocks, following Cone
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LLVMBasicBlockRef start_block = LLVMGetInsertBlock(c->builder);
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LLVMBasicBlockRef start_block;
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LLVMBasicBlockRef phi_block = llvm_basic_block_new(c, op == BINARYOP_AND ? "and.phi" : "or.phi");
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LLVMBasicBlockRef rhs_block = llvm_basic_block_new(c, op == BINARYOP_AND ? "and.rhs" : "or.rhs");
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@@ -4586,8 +4586,8 @@ static void cast_to_max_bit_size(Context *context, Expr *left, Expr *right, Type
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return;
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}
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Type *to = right->type->type_kind < TYPE_U8
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? type_int_signed_by_bitsize(bit_size_right)
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: type_int_unsigned_by_bitsize(bit_size_right);
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? type_int_signed_by_bitsize(bit_size_left)
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: type_int_unsigned_by_bitsize(bit_size_left);
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bool success = cast_implicit(right, to);
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assert(success);
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}
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37
test/test_suite/statements/comparison_widening.c3t
Normal file
37
test/test_suite/statements/comparison_widening.c3t
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@@ -0,0 +1,37 @@
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// #target: x64-darwin
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func void test1()
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{
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char a = 1;
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int b = 2;
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char c = b > a ? 1 : 0;
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}
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// #expect: comparison_widening.ll
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define void @comparison_widening.test1() #0 {
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entry:
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%a = alloca i8, align 1
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%b = alloca i32, align 4
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%c = alloca i8, align 1
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store i8 1, i8* %a, align 1
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store i32 2, i32* %b, align 4
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%0 = load i32, i32* %b, align 4
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%1 = load i8, i8* %a, align 1
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%uiuiext = zext i8 %1 to i32
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%gt = icmp sgt i32 %0, %uiuiext
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%check = icmp sge i32 %uiuiext, 0
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%siui-gt = and i1 %check, %gt
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br i1 %siui-gt, label %cond.lhs, label %cond.rhs
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cond.lhs: ; preds = %entry
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br label %cond.phi
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cond.rhs: ; preds = %entry
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br label %cond.phi
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cond.phi: ; preds = %cond.rhs, %cond.lhs
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%val = phi i8 [ 1, %cond.lhs ], [ 0, %cond.rhs ]
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store i8 %val, i8* %c, align 1
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ret void
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}
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