Fix regression with swizzle references for vectors #1810.

releasenotes.md

@@ -75,6 +75,7 @@
 - Bug when using +++ on value build a slice or array: the rhs cast was not done.
 - Fix bug preventing compile time slices from being iterated over with `$foreach`.
 - Fix bug with defer assignment in macro #1807.
+- Fix regression with swizzle references for vectors #1810.
 
 ### Stdlib changes
 - Increase BitWriter.write_bits limit up to 32 bits.

src/compiler/sema_expr.c

@@ -4854,12 +4854,27 @@ static inline bool sema_expr_analyse_swizzle(SemaContext *context, Expr *expr, E
 	index &= 0xF;
 	if (len == 1)
 	{
-		expr->expr_kind = EXPR_SUBSCRIPT;
+		switch (check)
+		{
+			case CHECK_ADDRESS:
+				expr->expr_kind = EXPR_SUBSCRIPT_ADDR;
+				break;
+			case CHECK_LVALUE:
+			case CHECK_VALUE:
+				expr->expr_kind = EXPR_SUBSCRIPT;
+				break;
+		}
 		expr->subscript_expr = (ExprSubscript) {
 				.index.expr = exprid(expr_new_const_int(expr->span, type_usz, index)),
 				.expr = exprid(parent)
 		};
-		return sema_expr_analyse_subscript(context, expr, check, false);
+		if (!sema_expr_analyse_subscript(context, expr, check, false)) return false;
+		expr->resolve_status = RESOLVE_DONE;
+		if (check == CHECK_ADDRESS)
+		{
+			expr_rewrite_insert_deref(expr);
+		}
+		return true;
 	}
 	Type *result = type_get_vector(indexed_type, len);
 	expr->expr_kind = EXPR_SWIZZLE;
@@ -7030,6 +7045,8 @@ static const char *sema_addr_check_may_take(Expr *inner)
 			}
 			return sema_addr_check_may_take(inner->access_expr.parent);
 		}
+		case EXPR_SUBSCRIPT_ADDR:
+			return NULL;
 		case EXPR_SUBSCRIPT:
 			return sema_addr_check_may_take(exprptr(inner->subscript_expr.expr));
 		case EXPR_TYPEINFO:

test/test_suite/vector/swizzle_vector_ref.c3t

@@ -0,0 +1,27 @@
+// #target: macos-x64
+module foo;
+
+import std;
+fn int main()
+{
+  int[<2>] vec;
+  int* a = &vec.x;
+  *a = 1;
+  assert(vec.x == 1);
+  return 0;
+}
+
+/* #expect: foo.ll
+
+  %vec = alloca <2 x i32>, align 8
+  %a = alloca ptr, align 8
+  store <2 x i32> zeroinitializer, ptr %vec, align 8
+  store ptr %vec, ptr %a, align 8
+  %0 = load ptr, ptr %a, align 8
+  store i32 1, ptr %0, align 4
+  %1 = load <2 x i32>, ptr %vec, align 8
+  %2 = extractelement <2 x i32> %1, i64 0
+  %eq = icmp eq i32 %2, 1
+  call void @llvm.assume(i1 %eq)
+  ret i32 0
+}